GitHub / capstone-engine/capstone / commits
Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
| SHA | Message | Author | Date | Stats |
|---|---|---|---|---|
| 992e6d7f | x86: fix SETcc memory operand access (#3106) |
phix33 <1****3@u****m>
Committed by: GitHub <n****y@g****m> |
5 days ago | |
| 84b5f970 | riscv: propagate decode failure in decodeCSSPushPopchk (#3104) |
Samina <s****m@b****m>
Committed by: GitHub <n****y@g****m> |
5 days ago | |
| c4dd2851 | x86: mark rotate memory destinations as written (#3103) |
phix33 <1****3@u****m>
Committed by: GitHub <n****y@g****m> |
5 days ago | |
| 6f9738da | utils: fix off-by-one out-of-bounds write in append_to_str_lower (#3102) |
Samina <s****m@b****m>
Committed by: GitHub <n****y@g****m> |
5 days ago | |
| 17e40b3f |
ARM: Fix shift alias for MOVsi and MOVsr (#3098)
Co-authored-by: pancake <p****e@n****g> |
pancake <p****e@n****m>
Committed by: GitHub <n****y@g****m> |
9 days ago | |
| e1a71eb2 | x86: fix operand access for SHLD and SHRD (#3093) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
9 days ago | |
| 28270855 |
Bump softprops/action-gh-release from 2 to 3 (#3095)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
9 days ago | |
| a7ae66e8 |
Bump actions/upload-artifact from 4 to 7 (#3096)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
9 days ago | |
| a4ea4a9e | Alpha: Fix branch target truncation due to incorrect disp sign extension (#3092) |
jmestwa-coder <j****a@g****m>
Committed by: GitHub <n****y@g****m> |
11 days ago | |
| 9791930a | Build and upload cross compiled tar.gz packages (#2862) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
14 days ago | |
| ed810011 | Remove unused .gitmodules (#3087) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
14 days ago | |
| 0083ee78 | x86: fix TEST memory operand access and flags metadata (#3085) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
15 days ago | |
| 476a89c1 |
x86: Fix wrong displacements in mixed modes (#3084)
Co-authored-by: pancake <p****e@n****g> |
pancake <p****e@n****m>
Committed by: GitHub <n****y@g****m> |
15 days ago | |
| 2b25a5bf | Bump CS_VERSION_PRE_RELEASE after release (#3082) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
17 days ago | |
| b2bf6327 | Release 6.0.0-Alpha11 (#3079) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
17 days ago | |
| fab08515 |
Add AI guidance (#3081)
Co-authored-by: Rot127 <4****7@u****m>, Copilot Autofix powered by AI <1****t@u****m> |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
18 days ago | |
| 8f917b9a | x86: Fix access of X86_CMPSL memory operands - #3080 (#3080) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
20 days ago | |
| 31ec70e6 |
riscv: propagate register-class decode failure in decoders (#3071)
Signed-off-by: Syed Mohammed Nayyar <j****a@g****m> |
jmestwa-coder <j****a@g****m>
Committed by: GitHub <n****y@g****m> |
21 days ago | |
| b871849b |
x86: fix JO/JNO operand size in 64-bit mode by adding Intel/AMD mode flags (#...
Co-authored-by: Rot127 <u****o@q****g> |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
21 days ago | |
| 59eec7ec | Add Codecov workflow (#3076) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
23 days ago | |
| 475d5542 |
Replace all system allocations with cs_mem_ allocations. (#3074)
Co-authored-by: Copilot Autofix powered by AI <1****t@u****m> |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
24 days ago | |
| fa4f7359 | x86: fix EVEX writemask access in AT&T syntax (#3072) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
29 days ago | |
| 9c990989 | x86: fix access metadata for EVEX writemasks (#3059) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 2b7d6075 |
Bump pypa/cibuildwheel from 4.2.0 to 4.2.1 (#3070)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 465eb451 | Add AI guidelines and requirements. (#3064) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 26d632ec | cstest: compare the PPC branch details once and without requiring operands (#... |
phix33 <1****3@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 6c421c99 | X86: Zero the operand slot after moving operand details out of it (#3057) |
phix33 <1****3@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 73a17a4f |
PowerPC: add mcrxr instruction support (#3065)
Co-authored-by: Claude Sonnet 5 <n****y@a****m> |
John Stiles <j****s@g****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 605cdba4 | Handle case of vsprintf returning oob pointer offset. (#3060) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| e6fb396b | Improve runtime of ARM/AArch64 register name patching. (#3048) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 88fd72d1 | x86: fix near RET decoding with 0x66 and REX.W (#3049) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| aa91e738 | AArch64: SYSL writes its Rt operand, it does not read it (#3045) |
Andrew Gaul <a****w@g****g>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| d82c7265 | AArch64: fix Rt operand of the integer STLUR forms (#3046) |
Andrew Gaul <a****w@g****g>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 95c74d3d | M68K: Fix fmove.x 96-bit extended immediate decode and printing (#3016) |
billow <b****n@g****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 7f5f5fe6 |
RISC-V: Revamp flags to allow fine grained control over aliasing (#3008)
Co-authored-by: Rot127 <4****7@u****m> |
مصطفي محمود كمال الدين <4****0@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 41953823 | X86: Fix four AT&T operand-detail and text defects (#3042) |
phix33 <1****3@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 85a618e4 | Alpha: Fix implicit read/write details for some memory instructions (#3034) |
Atirna <n****0@g****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 210b0abd | PowerPC: Fix missing BO/BI details for branches with conflicting BO/BI encodi... |
phix33 <1****3@u****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 64edab73 | x86: fix VMOVUPS memory operand access (#3035) |
raaller <r****x@g****m>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 318900f2 | auto-sync: pin lit below 23 to unbreak CI (#3047) |
Andrew Gaul <a****w@g****g>
Committed by: GitHub <n****y@g****m> |
about 1 month ago | |
| 862b5971 | systemz: bounds-check register index in decodeRegisterClass (#3044) |
jmestwa-coder <j****a@g****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 3a8d30a6 | x86: use effective address size for the loop counter register (#3025) |
phverg <p****s@g****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 251c5bb4 | Add Valgrind cmake tests. (#3030) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 86ea37f7 | Add MSAN build option to CMakeLists.txt (#3029) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 265a08ff | Replace nftw() with custom made function. (#3028) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| cd4bb2a3 | Fix access to uninitialized memory. (#3011) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 768166e4 | HHPA: Correct name of r0 register - flags -> r0 (#3024) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 542e35bd |
Bump pypa/cibuildwheel from 4.1.1 to 4.2.0 (#3026)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
about 2 months ago | |
| 1c1f6f4e |
AArch64: Fix diet-mode NULL deref in printMatrixTileVector (#3017)
Co-authored-by: Amit Sides <a****s@u****m> |
Sides <6****s@u****m>
Committed by: GitHub <n****y@g****m> |
2 months ago | |
| 9933d7fd | Bump cmocka to 1.1.8 and use gitlab as download for reliability. (#3018) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
2 months ago | |
| c22422bd | Run clang-format (#3015) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
2 months ago | |
| de4b58b2 | Merge commit from fork |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
2 months ago | |
| ef377bd9 | Xtensa: Fix stack overflow. (#3012) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
2 months ago | |
| 6fb5a171 |
Bump pypa/cibuildwheel from 4.1.0 to 4.1.1 (#3006)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
2 months ago | |
| 4cfa330a | Fix xtensa test with wrong mode selection. (#3004) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| ee175f7d |
Bump actions/setup-python from 6 to 7 (#2999)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 0090a070 | xtensa: fix sign-extend scaled offsets in decodeOffset_* helpers (#2997) |
Samina <s****m@b****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 9f73e92b |
Bump actions/labeler from 6 to 7 (#3000)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| d770dd02 | AArch64: report NZCV access for MRS/MSR of NZCV (#3002) |
Andrew Gaul <a****w@g****g>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 4eb90672 |
Xtensa: gate ESP32-S3 and HIFI3 ops behind CS_MODE_XTENSA_ESP32S3 (#2979)
Co-authored-by: Denys Melnyk <d****s@c****m> |
Denys Melnyk <g****6@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| a0b10fee | Bump header PRE_RELEASE to Alpha11 (#3001) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 6ef3f485 | v6.0.0 Alpha10 (#2998) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 44ca2578 |
AArch64: prevent literal displacement truncation (#2984)
Signed-off-by: Amaan Mujawar <a****r@g****m> |
Amaan Mujawar <a****r@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 032f7999 |
RISC-V: Add v5 compatibility behaviour for CS_MODE_RISCVC/RISCV_C (#2996)
Co-authored-by: Rot127 <4****7@u****m> |
مصطفي محمود كمال الدين <4****0@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 54fcf14f |
AArch64: Add option for explicit shifted wide immediates (#2995)
Signed-off-by: Amaan Mujawar <a****r@g****m> |
Amaan Mujawar <a****r@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| ca197a0f |
Bump actions/checkout from 4 to 7 (#2994)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| ae11e423 | M68K: Fix FPU condition and FMOVEM decoding (#2993) |
billow <b****n@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 857e556c | Add overflow check to cs_kern_os_calloc (#2980) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 6f41db92 | Don't build cstool arch specific details printing, if not requested. (#2888) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| f3d47d1b |
Xtensa: Swap isIntN arguments in decodeOffset_16_16Operand (#2986)
Signed-off-by: Syed Mohammed Nayyar <j****a@g****m> |
jmestwa-coder <j****a@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| d5566615 |
M68K: Handle EA decoding error case and add ColdFire EMAC_B dual-acc MAC (#2...
Co-authored-by: Rot127 <4****7@u****m> |
billow <b****n@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| b113b91f | guard operand append past MAX_MC_OPS in MCInst (#2985) |
Samina <s****m@b****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| a99c49cd | sh: fix signed shift overflow in sh_disassemble dsp decode (#2983) |
jmestwa-coder <j****a@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 0055d669 |
Bump actions/checkout from 6 to 7 (#2974)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 4e088ebe | fix AArch64 predicate-as-counter register printed in hex (#2976) |
yufeng Z <y****j@g****m>
Committed by: GitHub <n****y@g****m> |
3 months ago | |
| 8b2772f5 | Apply clang-format (#2975) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 19243483 |
Add frm operands to float/double instructions (#2972)
Co-authored-by: Rot127 <4****7@u****m> |
مصطفي محمود كمال الدين <4****0@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| faffeec2 | Fix naming convention of Alpha enums. (#2971) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 5c2b4ac6 | Fix crash due to invalid RISCV register (#2966) |
مصطفي محمود كمال الدين <4****0@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 89267707 | Alpha: fix decoder bugs and add test coverage (#2967) |
Matt Turner <m****8@g****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| a7c75773 |
Bump actions/download-artifact from 4 to 8 (#2955)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 09e76802 | Fix OOB reads/writes - CVE-2026-55893 & CVE-2026-55894 (#2968) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 8778e289 |
Bump pypa/cibuildwheel from 4.0.0 to 4.1.0 (#2965)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 7441aee2 | m68k: fix off-by-one bounds check in M68K_insn_name (#2964) |
jmestwa-coder <j****a@g****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 3aa15118 | Find writeback registers (#2960) |
Petar Andrić <s****e@n****t>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| d0354906 |
Bump pypa/cibuildwheel from 3.4.1 to 4.0.0 (#2961)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 41d31f7d |
Bump docker/setup-qemu-action from 3 to 4 (#2956)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 365dc642 |
Bump actions/upload-artifact from 4 to 7 (#2957)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 25c47963 |
Fixed CONTRIBUTING.md not listing all Architectures (#2952)
Co-authored-by: Phoebe <r****p@b****t> |
Rectrap <r****p@h****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| a7750466 | Without -any the labeler doesn't seem happy (#2951) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 3df4aef9 | Fix labeler (#2950) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| b8551567 |
Add regression tests for the host big endian m68k and x86 bugs spotted in v5 ...
Co-authored-by: pancake <p****e@n****g> |
pancake <p****e@n****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 3df6ff01 |
Bump actions/labeler from 4 to 6 (#2945)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 1f003978 |
Bump actions/setup-python from 5 to 6 (#2946)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 847c1185 |
Bump softprops/action-gh-release from 2 to 3 (#2949)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 09eadb1e |
Bump actions/checkout from 4 to 6 (#2948)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| c2801198 |
Bump pypa/cibuildwheel from 3.1.3 to 3.4.1 (#2944)
Co-authored-by: dependabot[bot] <4****]@u****m> Signed-off-by: dependabot[bot] <s****t@g****m> |
dependabot[bot] <4****]@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| b4344065 | Move dependabot.yml to correct dir (#2942) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| bc79ce54 | Increment PRE_RELEASE version (#2940) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago | |
| 973b9096 | Release 6.0.0 Alpha9 (#2938) |
Rot127 <4****7@u****m>
Committed by: GitHub <n****y@g****m> |
4 months ago |